RTL descriptions for word-level arithmetic components typically specify the architecture at the bit-level of the registers. Word-level functionality of a component from its bit-level specification - this is particularly useful in simulation since word-level descriptions can be simulated much faster than bit-level descriptions. Word-level abstractions are also useful for reducing the complexity of component matching, since the number of words is significantly smaller than the number of bits. We present an algorithm for abstraction of word-level linear functions from bit-level component descriptions. We also present complexity results for component matching which justifies the advantage of performing abstraction prior to component matching.

In order to meet the market's increasing demands for higher-performance functionality, smaller system form factors, and the reduction of cost and power, system designers are integrating higher levels of mixed-signal functionality into their system-on-chip (SoC) designs.

As the number of mixed-signal components in these SoC designs increases, basic functional verification becomes critical for early silicon success. Without this, system designers will spend millions of dollars on silicon re-spins, waste precious design and verification resources and quite possibly miss their market window.

System designers today have more choices than in the past. It is no longer necessary when designing a mixed-signal system to be limited to mixed-signal ASICs, analog MCUs or discrete components. Mixed-signal FPGAs add a new dimension to the system integration puzzle, improving aspects of system integration, such as total system cost, reliability, reconfigurability, time to market, etc. At its core, this new paradigm – the "programmable system chip" (PSC) – integrates FPGA gates, embedded flash and analog functionality into a single programmable device, offering an ideal low cost path with true programmability, and with which system designers can rapidly design and develop their complex mixed-signal systems.

First-time silicon success begins with the choice of a programmable design platform, one that has already achieved basic functional validation. FPGAs are – by a wide margin – becoming the vehicle of choice for modern, highly-integrated SoC systems, as noted by market analyst firm Dataquest ("The growing threat to EDA software" – Electronic Business).

"This increased scope of silicon capabilities, now spanning FPGA replacement to mixed-signal ASIC and complex digital SoC development, further secures our position as a valuable system development partner for our customers,".

"A 'smart' system design and verification flow for mixed-signal FPGAs helps digital designers overcome the complexities of the analog domain". By Michael Mertz and Venkatesh Narayanan, Actel

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